YOLOv11-Nano on FPGA
University of Calcutta · IEEE ISVLSI 2026- → First peer-reviewed YOLOv11 DPU deployment — accepted as full paper at IEEE ISVLSI 2026.
- → 25.77 FPS on ZCU104 (+49% throughput) and 38.81 ms latency (−33%) vs Intel i5-12650H.
- → Collapsed 9 fragmented DPU subgraphs to 1 via operator substitution (SiLU→ReLU, Softmax→HardSigmoid, matmul→element-wise).
- → Demonstrated hand-curated 250-image calibration outperforms random 1300-image sets under INT8 quantisation.
25.77 FPS
+49% throughput vs CPU