<?xml version="1.0" encoding="UTF-8"?><rss version="2.0"><channel><title>Aishik Bandyopadhyay — Writing</title><description>Thoughts on AI engineering, hardware ML, and research.</description><link>https://aishikb.dev/</link><item><title>AI Harnesses Explained</title><link>https://aishikb.dev/blog/ai-harnesses-explained/</link><guid isPermaLink="true">https://aishikb.dev/blog/ai-harnesses-explained/</guid><description>Unlocking AI potential with harness engineering, key components, and best practices</description><pubDate>Mon, 22 Jun 2026 00:00:00 GMT</pubDate></item><item><title>Running YOLOv11 on an FPGA: What I Learned</title><link>https://aishikb.dev/blog/yolov11-fpga-edge-inference/</link><guid isPermaLink="true">https://aishikb.dev/blog/yolov11-fpga-edge-inference/</guid><description>A practical breakdown of deploying YOLOv11-Nano on the Xilinx ZCU104 — operator substitutions, INT8 calibration pitfalls, and the 49% throughput gain that made it to IEEE ISVLSI 2026.</description><pubDate>Thu, 15 Jan 2026 00:00:00 GMT</pubDate></item></channel></rss>